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| Further Features >> | |
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Up until this point in the tutorial we have assumed that the processor is only able to process one instruction at a time. All examples have shown an instruction having to be executed in full before the next one can be started on. However, this is not how modern CPUs work. Pipelining is the name given to the process by which the processor can be working on more than one instruction at once. The simplest way to approach pipelining is to consider the three stage fetch, decode and execute instruction execution cycle outlined earlier. There are times during each of these subcycles of the main cycle where the main memory is not being accessed, and the CPU could be considered 'idle'. The idea, therefore, is to begin the fetch stage for a second instruction while the first stage is being decoded. Then, when instruction one is being executed and instruction two is being decoded, a third instruction can be fetched. Below is an interactive animation that demonstrates the benefits which this simple form of pipelining can produce. You can move through the steps of the animation using the buttons located at the bottom right. While they are red they are unable to be clicked, but when green they work as follows:
Across the nine time cycles shown above, the non pipelined method manages to completely execute three instructions. With pipelining, seven instructions are executed in full - and another two are started. However, pipelining is not without problems, and does not necessarily work as well as this. For more on the problems associated with pipelining and how they can be overcome, click the next arrow below. |
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© Matthew
Eastaugh, 2004 |
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